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Colloquium: Towards Realizing Energy Proportional High-Speed Wireline Systems


Thursday, April 2, 2015 8:45 AM - 9:45 AM

Tejasvi Anand, PhD Candidate
University of Illinois, Urbana-Champaign

Intra- and inter-chip communication links in both high performance compute systems and mobile platforms consume significant fraction of the system power. Technology scaling combined with techniques such as near-threshold operation and dynamic voltage and frequency scaling have greatly improved energy efficiency of computation kernels.

Additional information: http://eecs.oregonstate.edu/colloquium-series


Kelley Engineering Center (campus map)
1007
1 541 737 3617
Sch Elect Engr/Comp Sci
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