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PhD Oral Preliminary Examination – Tao He


Monday, May 16, 2016 10:30 AM - 12:30 PM

Dynamic Error Calibration in DACs for Continuous-Time Delta-Sigma Modulator
Nowadays, state-of-the-art continuous-time delta-sigma modulators are mostly limited by nonidealities in their multi-bit DACs. Different from traditional discrete-time counterpart working under relatively low frequency, static errors in the DAC is not the only dominant error source. Continuous-time Delta-Sigma modulators reported in latest publications can easily handle Giga-hertz sampling rates. Dynamic errors in the DAC become more pronounced and starting limit the linearity of the modulator. In this preliminary presentation, impacts of DAC nonidealities in delta-sigma modulator will be illustrated. A novel dynamic error calibration method will be proposed to target a prototype chip with over 80dB SNDR within 50MHz bandwidth.

Major Advisor: Gabor Temes
Committee: Un-Ku Moon
Committee: Arun Natarajan
Committee: Thinh Nguyen
GCR: Maggie Niess


Kelley Engineering Center (campus map)
4107
Nicole Thompson
1 541 737 3617
Nicole.Thompson at oregonstate.edu
Sch Elect Engr/Comp Sci
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