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PhD Oral Preliminary Examination – Lei Zheng


Tuesday, June 13, 2017 9:30 AM - 11:30 AM

Modeling and Design of Interconnects and Passive Components for Millimeter-Wave Integrated Circuit in Silicon
Emerging fifth generation (“5G”) mobile networks and automotive radar systems are stimulating the design of mmWave integrated circuits (ICs) on conventional silicon substrate. On-chip passives, such as interconnects, spiral inductors and transformers, are limiting the overall performance of RF/mmWave ICs. The goal of this research is to develop fully scalable and broadband equivalent circuit models for on-chip interconnects and passives from DC up to 110 GHz. Ultimately, this research will enable efficient design of RF/mmWave ICs through accurate parameterized models for interconnects and passives. In this work, we propose a systematic modeling methodology to capture the frequency-dependent resistive losses in on-chip passives. The circuit element values are parameterized in terms of closed-form expressions for layout and process parameters, making the models fully compatible with the standard circuit simulation environment (e.g., SPICE, Spectre and ADS). We apply the modeling methodology to example on-chip transmission lines and inductors and validate it through measurements of fabricated test chips.

Major Advisor: Andreas Weisshaar
Committee: Arun Natarajan
Committee: Gabor Temes
Committee: Karti Mayaram
GCR: Yun-Shik Lee


Kelley Engineering Center (campus map)
1005
Calvin Hughes
1 541 737 3168
Calvin.Hughes at oregonstate.edu
Sch Elect Engr/Comp Sci
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