Oregon State University

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PhD Oral Preliminary Examination – Manideep Gande


Friday, May 25, 2012 12:45 PM - 2:45 PM

Time Based Data Converters
in modern day CMOS processes is progressing towards finer scale geometries and lower supply voltages, thereby increasing the demand for circuits which use time based information and are more digital in nature. This thesis is focused on data converters trying to utilize the above features.

The thesis is primarily divided  into two parts. The first part focuses on a technique to convert the time information into a digital word.A high resolution time-to-digital converter (TDC) architecture is proposed which combines the principles of noise-shaping quantization and charge-pump to build a third-order ΔΣ TDC with a dedicated feedback DAC. Fabricated in a 0.13µm CMOS process, the prototype TDC achieves better than 71dB DR for a 2.81MHz signal bandwidth. The second part proposes a digital calibration technique which varies the  sample time of the output to remove non-linearity in any traditional ADC architecture. In order to prove this, a first order VCO based delta-sigma ADC was built in 0.13µm CMOS process. The VCO based ADC inherently suffers from high non-linearity, thereby proving to be a ideal candidate for the calibration technique.

Major Advisor: Un-Ku Moon
Committee: Pavan Hanumolu
Committee: Karti Mayaram
Committee: Gabor Temes
GCR: Adam Schultz


Kelley Engineering Center (campus map)
4107
Shannon Thompson
1 541 737 7234
shannon.thompson at oregonstate.edu
Sch Elect Engr/Comp Sci
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