Oregon State University

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PhD Oral Preliminary Examination – Chia-Hung Chen


Wednesday, June 19, 2013 10:00 AM - 12:00 PM

Micropower Incremental Data Converters
Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion. A single-loop Incremental delta sigma ADC was designed and fabricated in 90nm for a biosensor interface circuit. It incorporates one integrator and uses noise-coupling technique to achieve second-order noise-shaping. The use of feed-forward coupling and multi-bit internal quantizer allows low swing at the integrator, and hence low-power operation. The measured SNR is 74 dB, with a signal bandwidth 2 kHz, and 14 uW power consumption. A new incremental ADC is proposed for ECG signal conversion.  It extends the order of a conventional incremental ADC from N to (2N-1) by way of a two-step operation. However, it only needs the same circuitry as the Nth-order IADC. A second-order loop filter was designed in 65nm to demonstrate this concept to achieve third-order noise-shaping performance. It is designed to achieve 96 dB SNR with a sampling frequency of 96 kHz to convert signals with bandwidths up to 250.

Major Advisor: Gabor Temes
Committee: Thinh Nguyen
Committee: Raviv Raich
Committee: Albrecht Jander
GCR: Margaret Niess 


Kelley Engineering Center (campus map)
1007
Nicole Thompson
1 541 737 3617
Nicole.Thompson at oregonstate.edu
Sch Elect Engr/Comp Sci
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