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Event Details

PhD Oral Preliminary Examination – Karthikeyan Reddy

Thursday, August 22, 2013 1:00 PM - 3:00 PM

Design Techniques for Delta Sigma Modulators Using VCO Based ADCs
VCO-based ADCs have recently emerged as attractive alternative to conventional delta sigma architectures. As VCO-based ADCs achieve noise shaping without using feedback, they are capable of operating with GHz sampling clock frequencies. However, their performance is severely limited by the non-linearity of the VCO’s transfer characteristic. We examine various techniques that were proposed to overcome this limitation. Two new architectures which overcome this limitation is proposed.

In the first approach, a continuous-time (CT) Delta Sigma modulator using a VCO-based internal quantizer is proposed. It incorporates a non-linear VCO as the second stage in a 2-stage residue canceling quantizer (RCQ) and mitigates the impact of its non-linearity by spanning only a small region of the VCO’s tuning curve.

In the second approach, a VCO quantizer which provides a proportional-differential (phase-frequency) feedback mechanism in the modulator loop is proposed. The proportional path alleviates the non-linearity problem of the VCO, while the differential feedback helps in providing a one clock period delay in the proportional path. This additional delay absorbs the propagation delay of the dynamic element matching (DEM) circuit, allowing the modulator to be clocked at GHz sampling frequencies.

Major Advisor: Pavan Hanumolu
Committee: Un-Ku Moon
Committee: Gabor Temes
Committee: Kartikeya Mayaram
GCR: Merrick Haller 

Kelley Engineering Center (campus map)
Nicole Thompson
1 541 737 7234
Nicole.Thompson at oregonstate.edu
Sch Elect Engr/Comp Sci
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