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PhD Final Oral Examination – Chia-Hung Chen


Monday, November 25, 2013 12:00 PM - 2:00 PM

Micropower Incremental Analog-to-Digital Converters
Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion. A single-loop Incremental delta sigma ADC was designed and fabricated in 90nm for a biosensor interface circuit. It incorporates one integrator and uses noise-coupling technique to achieve second-order noise-shaping. The use of feed-forward coupling and multi-bit internal quantizer allows low swing at the integrator, and hence low-power operation. The measured SNR is 74 dB for 1Vpp input range, with a signal bandwidth 2 kHz, and 13.5 uW power consumption.

A new incremental ADC is proposed for biosensor signal conversion up to 250Hz bandwidth. It extends the order of a conventional incremental ADC from N to (2N-1) by way of a two-step operation. However, it only needs the same circuitry as the Nth-order IADC. A second-order loop filter was designed in TSMC 65nm to demonstrate this concept to achieve third-order noise-shaping performance. 93 dB dynamic range and 87dB maximum SNR are measured for 1V range at a sampling frequency of 96 kHz. The measured power is 11.8.

Major Advisor: Gabor Temes
Committee: Un-Ku Moon
Committee: Thinh Nguyen
Committee: Raviv Raich
GCR: Maggie Niess


Kelley Engineering Center (campus map)
1007
Nicole Thompson
1 541 737 3617
Nicole.Thompson at oregonstate.edu
Sch Elect Engr/Comp Sci
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