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MS Final Examination – Jia Guo


Tuesday, February 4, 2014 12:00 PM - 2:00 PM

Compensation Method of the Excess Loop Delay in Continues-Time Delta-Sigma ADCs Based on Model Matching Approach
Continues-Time (CT) Delta-Sigma (ΔΣ) Analog-to-Digital Converters (ADCs) have one important constrain, namely the excess loop delay. Some popular pervious compensation methods need to obtain the exact value of the excess loop delay in advance. However, the value of the excess loop delay is a uniform distribution random variable. In order to obtain better performance with the same loop filter, a new compensation algorithm for the excess loop delay of CT ΔΣ ADCs based on model matching method is presented in this thesis. By the new equivalence found by Cherry and Snelgrove, model matching algorithm can compensate for the adverse effects of the excess loop delay over a range of values efficiently. Compared to previous compensation methods, the model matching algorithm is more practical because the value of the excess loop delay is varying every clock period. It is proved that our mean value based algorithm can improve the SQNR performance of CT ΔΣ ADCs in most probability case of the excess loop delay varying range.

Major Advisor: Mario Magaña
Committee: Raviv Raich
Committee: Thinh Nguyen
GCR: Patrick Leenheer 


Kelley Engineering Center (campus map)
1007
Nicole Thompson
1 541 737 3617
Nicole.Thompson at oregonstate.edu
Sch Elect Engr/Comp Sci
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