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Seminar: Evolution of Multi-Gigabit Wireline Transceivers in CMOS


Tuesday, October 14, 2014 4:30 PM - 5:30 PM

Ichiro Fujimori, PhD
Vice President of Engineering, Central Engineering
Broadcom Corporation

The Internet Infrastructure is rapidly expanding to meet demands of increasing Internet traffic due to Cloud Computing/Storage. Wireline Transceivers are the data throughput bottleneck for SoCs used in Data Centers, as well as provide the communication backbone for Data Transport Networks. With the Moore’s law slowing down, the necessary cost reduction and bandwidth extension with diversified link requirements cannot be achieved by simply taking advantage of a new technology node. As a result, architecture and circuit innovations have become more important than ever for multi-gigabit Wireline Transceivers. Designers will need to explore key questions such as: Analog vs. DSP-based Transceivers, NRZ vs. PAM Coding, and Copper vs. Optical Interconnects to come up with the most competitive solution. This talk will provide further insights into these questions, as well as cover the latest advancements in such Wireline Transceivers and Wireline Communications applications.

Biography:
Ichiro Fujimori received the B.S. degree in Electrical Engineering from the Science University of Tokyo in 1985, and the PhD degree from the University of Hiroshima in 2003.

In 1985 he joined Asahi-Kasei Microsystems (AKM), Japan, where he was engaged in the design and development of high-resolution Delta-Sigma data converters for Digital-Audio and Communications applications. In 2000, he joined Newport Communications (later acquired by Broadcom). As the Manager of Mixed-Signal Engineering, he led the team to the development of the first CMOS transceiver LSI’s for SONET OC-192 applications. He is currently the Vice President of Central Engineering at Broadcom Corporation, responsible for the IP roadmap and development of multi-gigabit SerDes for Networking, transceivers for Optical Communications, Ethernet Copper PHY’s, PLL’s, and embedded Power Management circuits.

Dr. Fujimori is an IEEE Fellow, and the recipient the IEEE Journal of Solid-State Circuits, Best Paper Award in 2000. He has published more than 30 technical articles, and has conducted various Seminars, Invited talks, and Panels in the field of Data Converters and Wireline Communications. He has served in the Technical Program Committee of VLSI Circuits Symposium from 2009 to 2014. He currently serves in the Technical Program Committee of International Solid State Circuits Conference, and as the Associate Editor of the IEEE Journal of Solid-State Circuits. He holds 32 U.S. patents.


Kelley Engineering Center (campus map)
1007
Free
1 541 737 3617
Sch Elect Engr/Comp Sci
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